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I'm trying to use the resize function in order to convert a signed 12 bit value to a 31 bit value. But whenever I'm using the resize function the output value is 0. But when I'm manually converting it, it's getting converted correctly. Can anyoone please help me with this ?
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--- Quote Start --- I'm trying to use the resize function in order to convert a signed 12 bit value to a 16 bit value. But whenever I'm using the resize function the output value is 0. But when I'm manually converting it, it's getting converted correctly. Can anyoone please help me with this ? Thanks, --- Quote End --- you didn't show your code. if it is std_logic_vector you need to define if it is resized as signed or unsigned so that negative values are filled with ones. data_resized <= resize(signed(data),18); -- assuming data is 16 bits std_logic_vector
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--- Quote Start --- you didn't show your code. if it is std_logic_vector you need to define if it is resized as signed or unsigned so that negative values are filled with ones. data_resized <= resize(signed(data),18); -- assuming data is 16 bits std_logic_vector --- Quote End --- data_in : IN std_logic_vector(11 downto 0); ( including the signed bit ) -- converting to 31 bit signal l_data_in : signed(30 downto 0); l_data_in <= resize(signed(data_in),31); I was using the same thing that you posted, but all my converted values were 0 when I checked in signaltap
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--- Quote Start --- data_in : IN std_logic_vector(11 downto 0); ( including the signed bit ) -- converting to 31 bit signal l_data_in : signed(30 downto 0); l_data_in <= resize(signed(data_in),31); I was using the same thing that you posted, but all my converted values were 0 when I checked in signaltap --- Quote End --- I can assume your problem of zeros is not related to resize function failure. resize is simple function that extends the sign bit.
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