Resource consumption of Heterogeneous block elements

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Resource consumption of Heterogeneous block elements

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Dear Friends,

I am currently doing my PG project in area minimisation of IP core(Router, Processing Elements and Filter etc) blocks.

For this i need reference of various heterogeneous block elements area/resource consumption interms of LE's. Since i am taking worked out reference of LE's

Is there any link or document which gives comparison of LEs and Heterogeneous block elements power consumption, bandwidth, delay..etc details?

Regards,

Deena

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