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In design I am using Tripple-Speed Ethernet Intel FPGA IP(altera_eth_tse) with 10/100/1000Mb Ethernet Mac with 1000BASE-X/SGMII PCS core variation.
While compiling I get following error
`pragma protect data_block
|
$PL_DIR/src/1GbE/GbE/altera_eth_tse_mac_1930/synth/altera_eth_tse_mac.v,22|26): Error while decrypting : unable to load key :(invalid/blank keyOwner/KeyName (file ),may be wrong key is used for encryption/decryption ).
In my Make file I have included *_atoms.sv files
SUPPORT_FILES := $(call uniq, \
$(QUARTUS_DIR)/eda/sim_lib/cadence/fourteennm_atoms_ncrypt.sv \
$(QUARTUS_DIR)/eda/sim_lib/cadence/ct1_hssi_atoms_ncrypt.sv \
$(QUARTUS_DIR)/eda/sim_lib/cadence/ct1_hip_atoms_ncrypt.sv \
$(QUARTUS_DIR)/eda/sim_lib/cadence/cr3v0_serdes_models_ncrypt.sv \
$(QUARTUS_DIR)/eda/sim_lib/cadence/ctp_hssi_atoms_ncrypt.sv \
$(QUARTUS_DIR)/eda/sim_lib/ct1_hip_atoms.sv \
$(QUARTUS_DIR)/eda/sim_lib/ct1_hssi_atoms.sv \
$(QUARTUS_DIR)/eda/sim_lib/ctp_hssi_atoms.sv \
$(QUARTUS_DIR)/eda/sim_lib/altera_primitives.v \
$(QUARTUS_DIR)/eda/sim_lib/altera_primitives_quasar.v \
$(QUARTUS_DIR)/eda/sim_lib/220model.v \
$(QUARTUS_DIR)/eda/sim_lib/sgate.v \
$(QUARTUS_DIR)/eda/sim_lib/altera_mf.v \
$(QUARTUS_DIR)/eda/sim_lib/altera_lnsim.sv \
$(QUARTUS_DIR)/eda/sim_lib/fourteennm_atoms.sv \
How can I fix it?
Thanks.
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Hi,
May I know does this happens only on the Cadence simulator? Does Modelsim work?
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