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SDC file Warnings : Could not be matched with a pin/port

Altera_Forum
Honored Contributor II
‎10-11-2011 06:37 PM
2,908 Views

Hello, 

 

Good Morning, 

 

I was trying to run my project in Altera Quartus II web edition software with Cyclone III as the device. I wrote my own SDC file so that it can read it from there. However i encountered these two warnings while running the Timequest Timing Analysis : 

 

1) create_generated_clock -duty_cycle 50.000 -multiply_by 1 -divide_by 4 -source [get_pins {pll_20to26|altpll_component|auto_generated|pll1|clk[0]}] -master_clock {clk_26mhz_in} -name {clk_leds_div4} [get_pins {leds_kitt|clk_div_4a|clk_d4}] 

 

When i try to generate a clock in my sdc file it gives me this warning : 

 

Warning: Ignored filter at a.sdc(17): leds_kitt|clk_div_4a|clk_d4 could not be matched with a pin 

 

I am not sure why it can't match it to that pin/port? Could you help me where i might be going wrong? 

 

2) Similar warning comes up when i try to set a false path :  

set_false_path -from [get_ports usb0|ureg02[06]] 

 

It again says could not be matched to a port. 

 

Thanks a lot for your help..!
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