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Altera_Forum
Honored Contributor I
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SDI II Interface Altera

Dear All, Hope you all are well. I would like to have an idea to implement TRS(Timing reference signal) the way SDI II interface has implemented. How to bind those default TRS data with every input using VHDL ? Which function does it support? 

Thanks in advance. 

 

 

Bets regards, 

Nizam
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