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Hi
I have already designed and implemented TS over IP (SMPTE-2022-1/2) using Altera FPGAs, 1G Ethernet and external DDR-2 memory. I want to start design and implementation of 3G-SDI over IP (SMPTE-2022-5/6) using 10G MAC. Has anybody a similar experience with SDI over IP? How much it is different? Is it more difficult (besides 10G MAC)? ThanksLink Copied
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I had some attempts to make something like you did: SD-SDI to Gbit Ethernet. But I was unable to finish due to problems with Eth PHY transmit...
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If you had no problem with Ethernet transmit, the protocol would have no problem?
Did you have any problem with jitter control? Did you require an external memory; i.e. DDR-II/III for smooth output?- Mark as New
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Hi msj,
what kind of board are you using? How do you feed the TS to the board?- Mark as New
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For TSoIP I have a custom board, designed for broadcast applications. For TSoIP I feed the TS through the Ethernet interface and the extracted TS will be delivered to communication module inside the FPGA.
Raw TS can also be fed through ASI interface. Either an MPEG encoder or a TS player can be used for generating TS source with video content.- Mark as New
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--- Quote Start --- For TSoIP I have a custom board, designed for broadcast applications. For TSoIP I feed the TS through the Ethernet interface and the extracted TS will be delivered to communication module inside the FPGA. Raw TS can also be fed through ASI interface. Either an MPEG encoder or a TS player can be used for generating TS source with video content. --- Quote End --- Interesting, do you design it or buy? I would start a project on this field. Are you available to discuss in private?
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