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CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

SMA port usage

Altera_Forum
Honored Contributor II
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Hi there, 

 

I am not experienced with SMA ports, so I am sorry if my problem is not a real problem. I am using the HTG-S4GX-PCIE Stratix IV-based board from HiTechGlobal and reading the documentation it is stated that I can use the SMA ports connected to an external equipment, directly (oscilloscope, for instance). The problem is, when I tried to use the SMA ports, Quartus gave me an error, pointing out the need to use one pre-defined macro block, the ALTGX. 

 

Even not wanting to, I managed to integrate the ALTGX block to my design. Now is where the problems start. I have to check my output signal, on the SMA ports. In order to do that, I am taking the SMA TX ports and connecting it to my equipments. But when I do so, the ALTGX block does not work, as it needs the data from the TX ports to synchronize itself. Is that a way to work on SMA ports without using the ALTGX block? Or, is that a specific protocol (right now I am using basic protocol, 32 bits long, with 20 bits pattern recognition) I should use on ALTGX so it sends the data even it is not receiving it back?  

 

Finally, I need to send out the system clock, generated by internal PLL in order to integrate the board with my external equipments. I am trying to use the SMA clock port, but, again, not successfully. Am I missing something here? I did the same for other boards (use CLK SMA port to externalize the system clock) and for this one I couldn`t.. 

 

Thanks in advance for the help! 

 

Regards, 

 

PS: I am editing the post because I found something very strange happening. It is not related to my problem but I will post it here as well. 

 

I have a reset mapped to one push button, and this reset is only attached to an internal process (check attached image) that triggers different resets on my design. Still, when I looked at its behaviour, on SignalTap, it is completely random. Any good reason to explain it!?
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