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Hello, I want to implement embed_lab9 (ftp://ftp.altera.com/up/pub/altera_material/11.0/laboratory_exercises/embedded_systems/de1/embed_lab9.pdf) of altera using altera DE2 board and I have quartus version 9.0 which doesn't have Qsys component . Can somebody please help me in doing it using SOPC builder. Can somebody please upload its entire core (verilog) with it's nios driver if someone have them? because I am new to Altera boards.Thank you.
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I can help you with an alternative which is VHDL code:
https://github.com/aerlinger/embeddedsysfinalproject/blob/master/vhdl/de2_top.vhd- Mark as New
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https://github.com/aerlinger/embeddedsysfinalproject/blob/master/vhdl/de2_top.vhd
--- Quote End --- Thank you so much for reply but can you please tell me that is this code meant for SPI communication. Because I am unable to completely understand this code :confused: Thanks once again.
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