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Hi,
Do you have any statistic information about the STRATIX IV LVTTL low output voltage, the max Vil is 0.4V, but i need to know the distribution up to 0.3V (like 80%<0.3..)
And, what are the conditions to get low output volgage >0.3V?
Thanks!!
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Hi Shay,
You may refer to datasheet at link below for more information about that.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-iv/stx4_5v4.pdf (Page 20)
The VIL for 3.3V LVTTL is ranged from -0.3V - 0.8V. It should be applicable for your case.
Regards,
YL
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Hi, thank for the replay!
it is typo mistake I meant to Vol
level *statistic distribution*.
(i have 1k pull up resistor connected to this 3V_LVTTL) output)
When i/o is “0” max output can be up to 0.4V, we need to know how much precent of the devices (from same part number) will NOT exceed 0.3V.
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Hi Shay,
The VOL will not exceed 0.4V is for sure as per our datasheet. However, we do not sure whether the VOL will exceed 0.3V or not.
Regards,
YL
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