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Socket server design on Arria 10 GX FPGA board?

Altera_Forum
Honored Contributor I
967 Views

Hi,  

 

I was wondering whether there is an example design of socket server on Arria 10 GX FPGA board.  

 

I can find similar design: 

 

https://www.altera.com/support/support-resources/design-examples/intellectual-property/embedded/nios... 

 

But it is for Cyclone and Stratix devices.
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Altera_Forum
Honored Contributor I
67 Views

Was looking for this sometime back. If you refer to the user guide here: 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/tt/tt_nios2_tcpip.pdf 

 

You can generate this for the Arria 10 SoC development kit. I think it shouldn't be too difficult to port over to Arria 10 GX board
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