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Hello everybody, i am a freshman on FPGA. Recently, i am doing a design about nios. When i am trying to use the sdram as the running space of the system, the sdram doesn't wok. I looked for some ways to solve it but find i need to get some information about the " setup time and hold time of the cyclone devices". However, i've don't know where to find it. I tried the "Cyclone III handbook" and so on but fialed. Will there some one who knows that? I'll be so appreciate....
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--- Quote Start --- Hello everybody, i am a freshman on FPGA. Recently, i am doing a design about nios. When i am trying to use the sdram as the running space of the system, the sdram doesn't wok. I looked for some ways to solve it but find i need to get some information about the " setup time and hold time of the cyclone devices". However, i've don't know where to find it. I tried the "Cyclone III handbook" and so on but fialed. Will there some one who knows that? I'll be so appreciate.... --- Quote End --- Unlike ASIC devices, FPGAs including cyclone do not have fixed figures for tSU,tH as these are programmable over some range through set_input_delay (max & min) so you are lucky this time. Once entered you can read the result in timequest datasheet report.
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