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Specification for SMBUS interface of 10M25DA in Eagle Stream Archer City Reference Platform

GTLee
Beginner
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Hi,

 

I'd like to access SMBUS of SSD in HSBP(=front side) from the BMC in Eagle Stream Archer City Reference Platform.

Since I checked the Schematic, AST2600(=BMC chipset) is has SMB_HSBP_STBY_LVC3_R_SDA/SCL and it is connected to IOB1_K1/2 of 10M21DA(=Main FPGA) only.

In my guess, there are couple of I2C MUXs which is programmed in the 10M25DA and I should control it to access SMBUS of each SSD.

To do that,  I need some data sheet or user manual about it.

Is there any useful information or document about this?

If it is, please let me know.

 

Thank you.

GT Lee.

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Allan_A_Intel
Moderator
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Dear GT Lee,


Thank you for reaching out to us with your inquiry regarding the SMBUS interface of Intel® MAX® 10 10M25 FPGA in the Eagle Stream Archer City Reference Platform. We understand your desire to access the SMBUS of the SSD in HSBP from the BMC, and we're here to help.


To ensure that your question receives prompt attention from our FPGA experts, I will be moving this thread to our dedicated forum for FPGA-related discussions. Our forum is specifically designed to address queries like yours, and our team of experts actively monitors it to provide speedy responses.


By relocating this thread to the dedicated FPGA forum, you'll have a higher chance of receiving the information you seek about the I2C MUXs programmed in the 10M25DA and how to control them to access the SMBUS of each SSD.


Please keep an eye on the dedicated forum, where you can find valuable resources, data sheets, and user manuals related to the SMBUS interface and I2C MUXs in 10M25DA.


If you have any further questions or need additional assistance, don't hesitate to reach out either in this thread or the dedicated forum. Our team is eager to support you and provide the answers you're looking for.


Thank you for your understanding, and we appreciate your active engagement in our community. We are committed to providing you with a swift and satisfactory resolution in the dedicated FPGA forum.


Best regards,


Allan A.

Intel Customer Support


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