Strange behaviour with LEDs, 1 means LED off and 0 means LED on

[SegmentationFault]

Hello,

I have a development board with an EP4CE6E22C8 FPGA.

I have the following verilog code in Quartus Prime:

module Test(out);

output [7:0] out;
assign out = 8'b00111100;

endmodule 

The pin planner has been configured as pointed by the schematic. The problem is that 0 means on and 1 means off. I think this is a strange behaviour since the typical one is 1=on and 0=off.

Anybody knows if there is any option (in pin planner, quartus prime or whatever) to change this behaviour?

Thanks.

[FPGA56]

This is generally due to the hardware setup, with 3.3V connected to the LED which leads to the pin (see the image attached).

When the pin goes low, current flows through the LED towards the pin. When the pin is high both sides of the LED are at 3.3V and thus no current flows.

[SyafieqS]

Hi Luis,

Any update on this?