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Hello,
I am using a Stratix SX280LN3 device. To setup a 10G Ethernet link via SFP+ fiber optic link, I am using the Native PHY IP block.
Once the reset sequence has been correctly applied at power up, is it normal that rx_islockedtoref toggles between true and false, while rx_islockedtodata is always true? What causes rx_islockedtoref to toggle back to false, especially if the rx path remains locked on the data? Would that be a cause for concern, and should that trigger a reset of the PHY?
Many thanks for the help,
BeB
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Hi,
As I understand it, you have some inquiries related to the behavior of the rx_is_lockedtoref signal of the Native PHY. Yes, your understanding is correct. When the rx_is_lockedtodata signal stays at high, it indicates that the CDR has successfully lock-to-data. During this, the rx_is_lockedtoref signal can be ignored (It may toggle, stay low or stay high).
Please let me know if there is any concern. Thank you.
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Hi,
As I understand it, you have some inquiries related to the behavior of the rx_is_lockedtoref signal of the Native PHY. Yes, your understanding is correct. When the rx_is_lockedtodata signal stays at high, it indicates that the CDR has successfully lock-to-data. During this, the rx_is_lockedtoref signal can be ignored (It may toggle, stay low or stay high).
Please let me know if there is any concern. Thank you.
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Hi,
I believe the initial inquiry has been addressed. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

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