Stratix II GX, 50MHz Oscillator pin missing((

[Altera_Forum]

Hello colleagues, 

 I'm facing one really strange problem - in the reference manual for Stratix II GX EP2SGX90 transceiver on the page 2-9 there is 'Clocking circuitry Automatic Routing paths' figure. there is block with "50 MHZ Oscillator". I would like to use it, but there is no information about exact pin for this global clock.:confused:   so, please could you help me figure the pin for global clock '50 MHz Oscillator' out. I would really appriciate your help   Thanks,

[Altera_Forum]

Which revision of the reference manual are you referring to? I don't find the said page in any versions I have.

[Altera_Forum]

oh, ok.. 

the refernce manual full name: 'Stratix IIGX EP2SGX90 Transceiver Signal Integrity Development Board' development board version 1.0.0 and document version also 1.0.0, document date - may 2006   actually the figure has number as well, and it's 'Figure 2-4' )   Thank you,

[Altera_Forum]

O.K. You're referring to a Development Board manual, not the Stratix manual. I can't determine the actual clocking circuit from the manual I have, it seems to have errors, because in one place, it states that U8 is driven by the 50 MHz clock and in another, by the 156 MHz clock.

[Altera_Forum]

ok, Thanks for help)) 

 will try to figure smth out)   Thanks,

[Altera_Forum]

My guess is, that the 50 MHz clock is driving a FPGA pin directly, in this case one of the dedicated clk pins in a bank with the correct IO standard (most likely 3.3V). Don't you have any reference projects shipped with the board, that contain a complete pin definition?

[JBART38]

I am desperate. I can't find the software / CD for "Stratix II GX Transceiver Signal Integrity Development Board" anywhere. This is the file "SIIGX_SI_Kit-v1.0.0.exe". Can anyone help me ?? Thanks in advance.

JiriB