Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21618 Discussions

Stratix V GT device receiver parallel data output incorrect

Altera_Forum
Honored Contributor II
1,271 Views

Hi, 

 

Just to share that in case you observe receiver data output issue with Stratix V GT, the following KDB solution might be helpful: 

 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06242015_674.html
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
535 Views

 

--- Quote Start ---  

Hi, 

 

Just to share that in case you observe receiver data output issue with Stratix V GT, the following KDB solution might be helpful: 

 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06242015_674.html 

--- Quote End ---  

 

 

Thanks for sharing the solution and the patch.
0 Kudos
Altera_Forum
Honored Contributor II
535 Views

cool~ thnx cpchan :D

0 Kudos
Altera_Forum
Honored Contributor II
535 Views

Thanks lot cpchan.

0 Kudos
Altera_Forum
Honored Contributor II
535 Views

You are welcome.

0 Kudos
Reply