Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Symbol Files

Altera_Forum
Honored Contributor II
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Hi, 

 

I use symbol files as the TOP Level of my VHDL designs as it gives a nice visual representation of the modules. I usually edit the block to make the schematic flow logical. However if I change one of the VHDL designs and update the block, there does not appear a way to keep the pins in the same position. I've searched through the old posts and I couldn't find a solution.  

 

Is there a way to preserve the position of the pins on a hand edited symbol after updating? 

 

I'm using Quartus 13 BTW 

 

Regards
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Altera_Forum
Honored Contributor II
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basically, no. It keeps the pin names in the order they appear in the VHDL. You may be able to script it to modify it, but that would be down to you.  

Otherwise, its safer just to keep it all VHDL
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Altera_Forum
Honored Contributor II
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I figured as much :-( 

 

Thanks Tricky
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