Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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19699 Discussions

TSD incorrect values returned

Honored Contributor II

Greetings all, 


I'm currently using Quartus Prime 16.0 with 10M08SAU169I7G  

ADC reference is internal, 3.3V. 

I'm choosing 2MHz of ADC input clock, with a sampling rate for the TSD of 50KHz. I'm providing correctly the 2MHz through a PLL based on the system clock. (see the attached files to see the choosen configuration for the ADC in QSYS) 


In the NiosII software, the used command is alt_adc_word_read, after having initialized the ADC module with: (in order) 


adc_stop, adc_interrupt_disable, adc_set_mode_run_continuously, adc_clear_interrupt_status and adc_start,  


to set it in a continuos-running mode without the interrupt managment.  


The issue encountered, is that each ADC channel reads correctly the voltage on its input (testing each of them with a multimeter), but not the TSD. 


Every times, it measures values that are correct (like E91 or E95) for the Table 2.1 of the Altera ADC user guide but not for the temperature in which it is working (room temp). Speaking clearly, it measures -1°C while it should measure 30/35°C.  


Does anybody has some suggestions on how to proceede? 


Best Regards, 

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