TTL on FPGA

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

TTL on FPGA

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Hallo,

I searched a lot in the internet on that topic. I found out, that TTL is not compatible to LVTTL the FPGAs are based on. That' a pity, but ok.

My question now is as follows. I have the DE1 board with Cyclone II. In the manual, there are no "absolute maximum ratings" (like in the datasheets). Moreover, in the section about user IO pins, there is an information, that each pin has a resistance in series (47Ohm) to protect the FPGA from too high voltages. Does it mean that it is allowed to apply 5V on the IO pins?

I read already some stuff about how to convert TTL to LVTTL. So, this is not my question is referring to. My question is, in particular for this device, can I apply 5V on the pins or not. I would be also very interested, if somebody tried it already ;).

Thanks in advance.

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