Community
cancel
Showing results for 
Search instead for 
Did you mean: 
wberbert
Beginner
609 Views

TX problem on DE2-115

Im having issues with ethernet altera de2-115.

 

I have a design file with NIOS2 and TSE RGMII set using linux as SO from altera linux-sopcfpga. Everything works fine except TX of the ethernet chip.

When a issue a command I even see the TX led blinking but no data transmited, RX seems to work fine, using tcpdump I see de packages comming in and resquests for out packages, but no data transmited effectively.

 

I believe its a problem related to ENET_GTX_CLK but still have no clue what is going on. I tryied many options in dts file but no sucess until now.

 

using ifconfig I see a great numbers in rx packages and a small number in tx pacackes and some dropped packages in rx line.

 

have someone I clue or anyone had the same problem??

 

thanks

0 Kudos
2 Replies
Deshi_Intel
Moderator
12 Views

Hi Wanderson, You can consider to use TSE IP internal loopback feature to help isolate your issue debug. Refer to below link for TSE user guide doc https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_ethernet.pdf Chapter 4.1.9 - shown MAC local loopback guideline Chapter 4.2.8 - explain on PHY loopback guideline If you also encountered failure with TSE IP internal loopback test then maybe you didn't configure TSE IP correctly or you are not sending correct MAC packet data format to TSE MAC IP. Thanks. Regards, dlim
wberbert
Beginner
12 Views

tks

I read this PDF that's why I got so far :)

 

Is there a way to debug these signals with lite version of quartus?

 

Other think I notice is that the ENET1_TX_CLK (or zero depending which

ETH you are using) seems not oscislating, because when a use it the output TX led dont blink. It is a pin out of marvell phy.

 

Tried to supply this clock using pll the tx start blink but no data.

 

I will try loopback debug, mean while if someone knows anything else Im all ears.

 

tks.

 

Reply