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The Avalon-MM slave interface in the Rapidio IP core

Altera_Forum
Honored Contributor II
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Hello 

The Concentrator module provides an Avalon-MM slave interface that accesses all configuration registers in the RapidIO IPcore. 

while i was configing the IO module registers through the Avalon-MM slave interface,i make the sys_mnt_s_address[16:2]be the register's address ,and make the sys_mnt_s_writedata[31:0] be the configure data,when i use the signaltap to see the register's value ,the value names sys_mnt_s_readdata[31:0]===32'b0,the value of sys_mnt_s_readdata[31:0] wasn't equal to sys_mnt_s_writedata[31:0]  

Does the way that i configure the register is right? why the value of sys_mnt_s_readdata[31:0] wasn't equal to sys_mnt_s_writedata[31:0] ?
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Altera_Forum
Honored Contributor II
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What you're describing clearly doesn't tie up with what you're seeing. I suspect your code isn't connected up as you think it is or need it to be. 

 

Do you want to post some of the code and we can have a look?
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Altera_Forum
Honored Contributor II
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hello ,thank you for your help  

now ,i meet a new question:i can't find how to configure the signal io_s_address[31:3] (the signal of IO slave module) 

and when i use the signaltap to capture the signal packet_transmitted,it was always low_level,that means the packet wasn't send out of the IP core .i want to know what may cause the signal packet_transmitted always low_level?(i has already configured the IO slave module's registers) 

I'm looking foraward your help,thank you
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