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The problem with ALTMEMPHY

Altera_Forum
Honored Contributor II
‎03-16-2010 10:15 AM
1,077 Views

Hi: 

I used the ALTMEMPHY with my own ddr2 controller(full-rate), and in the simulation, the ALTMEMPHY couldn't generate the output mem_clk signal, but the internal wire mem_clk_2x is generated correctly. Has anyone knows how to solve this problem?
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