CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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How can I analyze the timing of SOPC components such as serial interfaces, interval timers, dma controllers, onchip memory, epcs controller, etc? The compilation didn't generate the corresponding sdc files for these components... Thanks, Willian
Most of these components don't require sdc files. As long as you give the parameters of the input clock, Timequest will make sure that the SOPC design will meet the requirements.
