Tutorial: Creating a Nios II Project on DE0-Nano and Quartus II 14.1

[Altera_Forum]

Hi Everybody! 

 I'm trying to get my DE0-Nano board work. I'm using the terasic de0-nano user manual (http://www.altera.com/literature/ug/de0_nano_user_manual_v1.9.pdf) and Quartus II 14.1. Using Quartus 11.1sp2, the tutorial in the manual works. I'm getting confused trying to get it work with the actual version of Quartus - I hope this post will help others with this board!  The Tutorial: Creating a Nios II Project starts in the manual on page 82...  ...page 87 in the manual: select tools > sopc builder - since there is no more SOPC Builder available, we use Qsys(14.1)...  I save the System File as: DE0_NANO_SOPC.qsys  rename the clock... select processor (Nios II classic)... jtag_uart ... onchip_memory2...  After updating the CPU-Settings for the memory vectors, I click "JTAG Debug Module" in the processor settings and select "Debug level: No Debugger". This makes some of the wires in Qsys (it seems that in SOPC Builder there was no manual wiring neccessary) disappear... (Attachment)  Add pio_led... There is an Export column. I double click the entry after "conduit" -> pio_led_external_connection  After wireing and Assigning Base Adresses: "The system cannot be generated when there are errors". Error is: DE0_NANO_SOPC.cpu Please choose an appropriate slave for the Break vector memory. The error disappears after assigning the break vector memory: onchip_memory2.s1 in cpu -> edit -> JTAG Debug Module  Now Generation can be completed with warnings.  After clicking Finish in Qsys, a window appears: "You have created an IP Variation in the file..." (Attatched .jpg)  Back in Quartus and back in the manual (page 112) I open a new verilog HDL File, enter the code (on page 112) and save as "myfirst_niosii.v".  Full of expectations I click processing -> start compilation to get the error: 12006 Node instance "DE0_NANO_SOPC_inst" instantiates undefined entity "DE0_NANO_SOPC"  Right clicking files, the file de0_nano_sopc.qsys can be manually added to the project.  Now processing -> start compilation results in the following errors:  Error (12002): Port "clk_50" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error (12002): Port "out_port_from_the_pio_led" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error (12002): Port "reset_n" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 3 errors, 4 warnings  Error: Peak virtual memory: 754 megabytes  Error: Processing ended: Tue Dec 30 18:56:51 2014  Error: Elapsed time: 00:00:34  Error: Total CPU time (on all processors): 00:01:04 Error (293001): Quartus II Full Compilation was unsuccessful. 5 errors, 4 warnings  Hope to get this baby to work!  Cheers!!!

[Altera_Forum]

I notice you've posted a few threads regarding the DE0-Nano board and the tutorial. I hope you're getting somewhere... 

 I've not attempted to create a design from the tutorial you mention. However, you're clearly struggling to connect up the components as required.  Can you get any of the examples, that come with the board, working? I'd suggest that you start with one of these, modify it and examine your changes. These reference designs are there to be used in just that way, saving you a great deal of effort (and frustration) in creating a design from scratch. Perhaps get comfortable with one of these examples before starting from scratch. At least then you know where you're heading.  The ADC example you mention (in another post) runs quite happily through 14.1 and programs into the board (I've tried it). I've also run the 'DE0_Nano_QSYS_DEMO' through 14.1 and into the board successfully. They're both there to be played with.  Happy New Year, Alex

[Altera_Forum]

Many thanks, Alex! All the best in 2015 for you, too! 

 Finally, I've got Nios II/e working on my board :) using things described in this tutorial (https://sites.google.com/site/fpgaandco/niosii-standalone)!  Don't know, why it works now... Maybe its because of enable_small_c_library, maybe its because I edited the BSP?  I'm happy, that I could get the LED to blink from C-Code running on Nios :) I also managed to programm the Flash memory on the board...  I got Quartus 14.1, too. It would be nice if Altera could update the manual for their board still being sold (since there is now 'Qsys' and no more 'SOPC builder').  Yeah! Finally, my LT-24 LCD display works with the examples provided by Altera :)  Hoping to get the ADC-example to work so that I can play with it, tomorrow =)

[Altera_Forum]

I finally got DE0 Nano's ADC working. here (http://www.alteraforum.com/forum/showthread.php?t=47197&p=194908&highlight=#post194908) is how it's done!

[Altera_Forum]

thank you for sharing your experience I was having the same problems and your tutorial helped me a lot. 

   --- Quote Start ---  It would be nice if Altera could update the manual for their board still being sold (since there is now 'Qsys' and no more 'SOPC builder').  --- Quote End ---    The board is not made by Altera is made by terasic technologies, they are the ones that need to update the User Manual but I completely agree with you.  Altera has a newer tutorial: introduction to the altera qsys system integration tool (ftp://ftp.altera.com/up/pub/altera_material/14.1/tutorials/introduction_to_the_altera_qsys_tool.pdf) is for the DE2-115 board but it can be easily adapted to the de0-nano.    --- Quote Start ---  Don't know, why it works now... Maybe its because of enable_small_c_library, maybe its because I edited the BSP?  --- Quote End ---    When you enabled the Small C Library the final size of the compiled C program was reduced so it was able to fit inside the On-Chip Memory, apparently the total memory size setting of 26000 is not enough, I made it work using a size of 49152.  best regards.

[Altera_Forum]

Hi, 

 I am having a problem compiling the myfirst_niosii.v as I get the following 3 errors, the same ones mentioned above; clk_50, out_port_from_the_pio_led, reset_n all do not exist in macrofunction DE0_NANO_SOPC_inst.  Can anyone suggest the solution?  Many thanks.

[gareththomasnz]

Re: you have created an IP Variation in the file.

You have to add the quip file