Unassigned pins of top level entity

[Altera_Forum]

Hello, 

 Sometimes in simulation, I add some pins to the top level entity, but then I will not use them.  What happen with the unassigned pins of the top level entity? Are they connected to some output pin of the FPGA?.   Thank you

[Altera_Forum]

--- Quote Start ---  Are they connected to some output pin of the FPGA?.  --- Quote End ---  Yes, if you define output ports. The pin list can tell.