Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21606 Discussions

Why all the pins but for power provider are low level after power on the EP3C10 ?

Altera_Forum
Honored Contributor II
‎11-29-2009 03:12 AM
1,002 Views

Hi, 

I just layout a PCB board for EP3C10E144N8,but after power on(3.3v-->Vccio,2.5v-->Vccai and 1.2v-->Vccint) the device,all pins but for power provider are low level(include pull-uped CONFIG_DONE,nCONFIG,nCE,nCSO). JTAG can not detect any device. 

At the power on status,any IO pins has about 200~900 ohm resistance to GND. 

 

So what causes this problem?  

Is my EP3C10E144 damanged? 

Can anyone help me? 

 

Thanks. 

 

Rgds. 

 

 

Eric xia 

 

:confused:
multiple-attachments.zip
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎11-29-2009 09:04 AM
326 Views

Your schematic doesn't show the ground connection of EP3C enhanced pad ("Pin145"). Did you connect it anyway?

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.