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Unconnected inputs of Cyclone III

HAlex
新規コントリビューター I
1,790件の閲覧回数

Hello

 

I am using EP3C40F484C8N FPGA in my board.

As now I want to remove some components assembled on PCB and connected to the FPGA inputs I want to know what modifications must be done in my Quartus based FPGA  design - like defining weak pull-ups on input pins, or simply removing these pins from the design or do nothing?

1. For inputs just defined as inputs but without connection to any logic inside FPGA.

2. For inputs defined and connected to the logic inside FPGA but this logic is not used.

 

Thank you

 

Alex

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1 解決策
HAlex
新規コントリビューター I
1,692件の閲覧回数

I will leave these pins defined as inputs (for any case) and will assign an internal weak pull up on them.

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8 返答(返信)
FvM
名誉コントリビューター II
1,768件の閲覧回数
Unconnected pin behaviour is set in device and pin options dialog, tri-stated with weak pull-up is the default option and fits most cases. For pins connected to FPGA fabric, the option can be set in assignment editor or pin planner. Consider that Cyclone 3 clock inputs have no weak pull-up feature and should be externally connected if ever possible.
HAlex
新規コントリビューター I
1,750件の閲覧回数

Hello

 

The option in device and pin dialog is for unused pins. In my case I have a defined inputs, some of them are connected to the FPGA logic (but actually not used by Nios or not effect on any essential output). FPGA doesn't know that the inputs are going to be disconnected. My question is if I need to recompile my FPGA (and remove unconnected pins/define them as weak pull-ups) or simply do nothing and leave design as is without recompilation?

 

Thank you.

 

Alex

FvM
名誉コントリビューター II
1,733件の閲覧回数
Floating inputs can cause additional current consumption and switching noise. Therefore you want to avoid floating inputs by any available means.
_AK6DN_
高評価コントリビューター II
1,722件の閲覧回数

Do you truly mean 'unused inputs' or are you really just referring to 'unused pins'?

Typically I include this setting in my .qsf files:

 

set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS OUTPUT DRIVING GROUND"

 

So that for any pins I don't refer to they just get set as a low output. So no floating inputs or pullups needed.

FvM
名誉コントリビューター II
1,702件の閲覧回数

I'm talking about floating inputs. These are FPGA pins with input buffer (e.g. all GPIO pins) that or not either externally or internally driven, at least by a weak pull-up. Read it as a comment on your previous idea to leave defined inputs without external driver or internal pull-up.

Regarding driving unused pins to ground, I see no adavantage but a risk of inadvertently shorting board signals. I always prefer the default weak pull-up setting. It has been suggested in old application notes to utilize unused pins as additional ground return, this may be useful for old PQFP packages with few ground pins. It's not necessary with BGA or exposed ground pin packages. 

HAlex
新規コントリビューター I
1,693件の閲覧回数

I will leave these pins defined as inputs (for any case) and will assign an internal weak pull up on them.

WZ2
従業員
1,576件の閲覧回数

Hi there,

I wanted to check if you have any further questions or concerns. If not, I will go ahead and mark this issue as resolved.

Additionally, we would greatly appreciate it if you could take a moment to fill out our survey. Your feedback is valuable to us and helps us improve our support quality.

Thank you for your time and cooperation.

Best regards,

WZ


HAlex
新規コントリビューター I
1,570件の閲覧回数

Hello

 

I don't have any further questions - and already marked this issue as accepted solution (to assign weak pull up on input pins for any case).

 

Thank you.

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