Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Unused Stratix IV Transceivers

Altera_Forum
Honored Contributor II
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Do I need to power the right side transceivers if I'm only using the left side? I've checked the pin guidelines and it appears that I have to power them even if I'm not using them? If I have to power them, do I still need to use ferrite beads to isolate the various pins? 

 

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Altera_Forum
Honored Contributor II
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I would still power them. Now do you need the beads? I would say no for the sake of the unused transceivers. The question I would wonder about is what noise if any those power rails would kick back onto your power supply (which is likely feeding the transceivers on the other side of the chip). You would think that if they weren't being used, it wouldn't be a problem. Have you asked your FAE to look into it?

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Altera_Forum
Honored Contributor II
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Does the Stratix IV manual also suggest to bias the unused transceiver inputs with pull-ups/pull-downs to prevent them from switching arbitrarily? This has been said for other GX chips. It would be a means to prevent interferences (beside additional current consumption) caused by the unused transceivers.

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Altera_Forum
Honored Contributor II
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Yes. It says to tie all the RX_P pins to GND through a 10kOhm resistor and the RX_N pins to GND through a 2nd 10kOhm resistor. What's strange is that you can tie the REFCLK_P/N pins together and use a single 10kOhm resistor. That's based upon the Stratix IV guidelines 1.5 but it's still watermarked as preliminary. I don't know how you can have a chip that's been released for over a year and still have preliminary documents.

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