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Warning: Ignored filter: *ws_dgrp|dffpipe_5e9:dffpipe9|dffe10a (RapidIO)

Altera_Forum
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Warning: Ignored filter: *ws_dgrp|dffpipe_5e9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *rs_dgwp|dffpipe_4e9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *ws_dgrp|dffpipe_qd9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *rs_dgwp|dffpipe_pd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *ws_dgrp|dffpipe_kd9:dffpipe10|dffe11a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *rs_dgwp|dffpipe_jd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *ws_dgrp|dffpipe_sd9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID Warning: Ignored filter: *rs_dgwp|dffpipe_rd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path: Argument <to> is not an object ID  

Hello, I'm building a design with a couple of components. The flash and ddr2 has been tested. And now I'm adding a Serial RapidIO core to the whole. Thus the cause of these warnings lie with the RapidIO core. I've ran the .tcl file and added the .sdc file. Everything seems fine besides the above warnings that the fitter gives. Does anyone know why or how I fix it?
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Altera_Forum
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Ignore them. When TimeQuest starts running, you'll see a message that says "Reading HDL embedded constraints"(or something like that), and this is where these .sdc constraints come from. They cut paths between domains within the dual-clock FIFO. I've seen these before and not sure why they don't match up. In general, you've probably already cut timing between the clocks in your .sdc, and so the false path is done already. This is only a concern if you have failing paths between domains inside the DCFIFO, which can be fixed by cutting timing between the asynchronous clock domains, i.e. cutting at the clock level rather than the path level.

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Altera_Forum
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Timequest gives the warnings below. He can't find the dcfifo_vof1 file, because it's not there, the SOPC builder didn't make it nor did I. Do I even need it? The RapidIO MegaCore Function v10.0 User Guide doesn't state anything about a DCFIFO. 

Ignored assignments for entity "dcfifo_vof1" -- entity does not exist in design 

Warning: Assignment for entity set_instance_assignment -name CUT ON -from delayed_wrptr_g -to rs_dgwp|dffpipe6|dffe7a -entity dcfifo_vof1 -tag quartusii was ignored Warning: Assignment for entity set_instance_assignment -name CUT ON -from rdptr_g -to ws_dgrp|dffpipe9|dffe10a -entity dcfifo_vof1 -tag quartusii was ignored Warning: Ignored filter at qsta_default_script.tcl(862): *ws_dgrp|dffpipe_5e9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *rs_dgwp|dffpipe_4e9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *ws_dgrp|dffpipe_qd9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *rs_dgwp|dffpipe_pd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *ws_dgrp|dffpipe_kd9:dffpipe10|dffe11a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *rs_dgwp|dffpipe_jd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *ws_dgrp|dffpipe_sd9:dffpipe9|dffe10a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc Warning: Ignored filter at qsta_default_script.tcl(862): *rs_dgwp|dffpipe_rd9:dffpipe6|dffe7a* could not be matched with a clock or keeper or register or port or pin or cell or partition Warning: Ignored set_false_path at qsta_default_script.tcl(862): Argument <to> is not an object ID Info: read_sdc
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