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I am having few unused banks in 10M16SAU169C8G. Kindly let me know whether I can leave the pins floating or should I connect them to any voltage rail? If so, which voltage rail?
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Generally, refer to the MAX10 pin connection guidelines Intel® MAX® 10 FPGA Device Family Pin Connection Guidelines and Quartus *.pin file generated for your project. Don't float dedicated GND and VCCIO pins. All bank VCCIOs must be connected to a valid power supply level.
Regards
Frank
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Hi Lakhsmi,
Thank you for the effort to reaching out Intel FPGA Community.
Yes, as Frank have explained, we would suggest you check the Pin Connection Guidelines for Intel Max 10 as per link provided.
There are some pins that need to be connected as per guidelines.
Regards,
Aqid
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As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
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