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Usermode

Altera_Forum
Honored Contributor II
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Can anyone please tell me the procedure for entering the usermode, in order to see the status of the CRC_ERROR pin in cycloneii EP2C35. 

 

Thank you in advance
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Altera_Forum
Honored Contributor II
499 Views

"User Mode" is the normal operating mode once the device has successfully configured. So if you have a configured device, it's in User Mode :) And from here you should be able to see the status of the CRC pin, assuming you have enabled this feature.

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Altera_Forum
Honored Contributor II
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I am new user to FPGA (Nios II, Cyclone II EP2c35F672c6) and presently trying to implement a simple VHDL code. Downloading the .sof image to the device using JTAG USB blaster is successful. But after downloading, the device again shows the same factory program and yellow LED is ON 

How can I make the device to run my user program? Is that related to switching to user mode? 

I tried the following things as suggested in forums: 

1. selected "Enable error detection CRC" in Device & Pin options 

2.Unused pin > reserve all unused pin = As input tri-stated. 

 

Plz help! 

Thanks
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Altera_Forum
Honored Contributor II
499 Views

Ganesh, 

 

 

--- Quote Start ---  

Downloading the .sof image to the device using JTAG USB blaster is successful 

--- Quote End ---  

 

 

How do you know this? 

 

 

--- Quote Start ---  

But after downloading, the device again shows the same factory program and yellow LED is ON 

--- Quote End ---  

 

 

Then your design did not download correctly. Or, are you referring to putting your design into a non-volatile configuration device? If so, this will require a different process, which depends upon how you have the configuration device connected to the FPGA. What yellow LED? Are you using a development kit? If so, which one? I need a little more information here. 

 

 

--- Quote Start ---  

I tried the following things as suggested in forums: 

1. selected "Enable error detection CRC" in Device & Pin options 

2.Unused pin > reserve all unused pin = As input tri-stated. 

--- Quote End ---  

 

 

CRC has nothing to do with device configuration. 

Configuring unused pins as input tri-stated is the safe option. Again, this will not affect the configuration process.
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Altera_Forum
Honored Contributor II
499 Views

Thanks for the reply. I am using development kit Nios II cyclone II embedded development kit. I figured out my problem. I had not assigned I/O pins properly. Using Pin planner when I assigned my inputs and output to a proper pin number in FPGA Cyclone II (EP 2C35F672C6), the user program starts automatically after Jtag downloaded successful (It is shown in progress window in "Programmer"). :)

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