Using Max 10 ADC pins for digital signal

[FXion]

We used 8 channels of the ADC + TSD for analog signal conversion, but one channel needs to be changed to a digital input (PWM signal). Initial thought was to free that ADC pin and use it as a digital I/0, but synthesis and routing failed. After checking the pin connection user manual, the ADC pins cannot be used for analog and digital simultaneously. We don't want to modify the board, any other way to work around this? Thanks

[YuanLi_S_Intel]

Hi Fan Xiong,

Yes, apologize that it cannot be used for both analog and digital pin simultaneously. Since it cannot be used simultaneously, the only way is to have digital pin placed on the other I/O pin or you change the FPGA image when you want to have that pin as digital I/O. This require remote update on the FPGA.

[FXion]

Thanks SooY. We cannot change our board connections so cannot use another digital IO. Do you have more reference on "you change the FPGA image when you want to have that pin as digital I/O"? We already have the remote remote update configured. Thanks and your help is much appreciated.

[YuanLi_S_Intel]

Hi Fan Xiong,

Yes since remote update is already available in the design. You may do like this. On image 1, change that pin to ADC pin and on image 2, change that pin to digital pin.

Thank You.

[FXion]

But when I changed the pin to a digital pin to create the 2nd image, Quartus generated an error: 176310 cannot place multiple pins assigned to pin location pin_B1 (IOPAD_X10_Y19_NO). I double checked that the ADC channel was released and not used. I Googled and tried Go to QuartusII Assignments menu -> Device -> Device and Pin Options -> Dual-Purpose Pins window, choose the value "Use as regular I/O". But this option is N/A due to the internal configuration mode. I still need to use the rest of the ADC channels, so maybe this still violates the MAX 10 I/O Restrictions Related to ADC Usage ( MAX 10 General Purpose I/O User Guide )

[YuanLi_S_Intel]

Ya, since ADC channel will be used. Then you cannot use that pin as digital I/O.

[FXion]

But previously you mentioned that this was doable by using 2 images and remote update? So I am confused now, is it feasible or not feasible?

[YuanLi_S_Intel]

Hi Fan Xiong,

Apologize for my misunderstanding. I previously thought the 2nd design is not using ADC channel. If both also using ADC channel, then we need to follow the guideline.