If I have single ended CLK inputs 3.3V LVTTL in bank3a, b or 8a, b does it matter what voltage is applied to VCC_CLKIN.
I guess it only matters if one of those bank is using a differential input clock, when the pin must be set to 2.5v
I have 3.3v LVTTL clock signals on bank 3a, 3b and 8a, but differential clock input on 8b. So I will put 2.5V on Vcc_clkin8b but 3.3V on the others. Is this correct?