VCC_CLKIN on cyclone iv gx150

[CNash2]

If I have single ended CLK inputs 3.3V LVTTL in bank3a, b or 8a, b does it matter what voltage is applied to VCC_CLKIN.

I guess it only matters if one of those bank is using a differential input clock, when the pin must be set to 2.5v

[a_x_h_75]

The threshold at which a clock edge is detected will be derived from VCC_CLKIN. So generally it will matter. However, in your case it shouldn't.

Cheers,

Alex

[CNash2]

Thanks Alex..

[Rahul_S_Intel1]

Hi, The VCC_CLKIN is only used for bank 3 and 8 remaining not.Kindly find the page no:4 for the below document. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/cyclone-iv/pcg-01008.pdf For other banks no need to consider

[CNash2]

I have 3.3v LVTTL clock signals on bank 3a, 3b and 8a, but differential clock input on 8b. So I will put 2.5V on Vcc_clkin8b but 3.3V on the others. Is this correct?

[Rahul_S_Intel1]

Yes others places which ever IO standard supports