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Hi,
I am using the Cyclone 10 GX in one of my designs.
I would like to measure the VCCT_GXB & VCCR_GXB voltage AC
component (ripple, dynamic response, noise etc) and make sure is wihthin the required
noise tolerance.
What is the recommended oscilloscope bandwidth limit settings for this measurement?
What is the maximum frequency of the voltage AC component (voltage regulator ripple, noise, dynamic response etc) that will reduce the FPGA performance and will not be filtered in the die\package?
Thanks!
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Hi ,
I would recommend the below .
The oscilloscope with bandwidth 1.5GHz bandwidth. you can choose the vendor as per your budget requirement.
The maximum frequency of the voltage AC component (voltage regulator ripple, noise, dynamic response etc).
These values for Cyclone 10 GX is published in the data sheet kindly refer the data sheet
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Hi ,
Kindly let me know, if you need further assistance.
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Hi Rahul,
Thanks for the reply!
Unfortunately, I could not find
data regarding the question below at any of Cyclone 10 documents I'm familiar with
(including Intel® Cyclone® 10 GX Device Datasheet).
"What is the maximum frequency of the voltage AC component (voltage regulator ripple, noise, dynamic response etc) that will reduce the FPGA performance and will not be filtered in the die\package?"
I'll appreciate if you can refer me.
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Hi,
To be precise, we do not published maximum and minimum value for components that you mentioned ,because we do not characterize those values because of high dependencies from external components .
But PDN provides the value for the ac component that is the only method.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_dev_specific_pdn_20.pdf
https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/signal-power-integrity/power-distribution-network.html
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Hi ,
Kindly let me know if you need further assistance
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Hi Raul,
My question is not related to the board ir the boards components but to the FPGA ASIC only. Off course the board cab used to reduce voltage AC component at any frequency.
Given an AC component in the FPGA voltage input (regardless the platform) - which frequency range of the AC component will reduce the performance of the FPGA and which frequencies will be filtered by the FPGA?
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Hi ,
I understand the concern from your side now , but to be precises , I do not have any recommendation or values , sorry to say that.
Only reference from my side is PDN.
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Hi ,
Kindly let me know if you need further assistance
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