I'm trying use a fpga EP4CE6F17 with a 8k mif file in a ROM component. With 13 lines from address e 7 lines from date. some 74lvc4245 to correct level voltage. Trying read using a master system console, but without sucess, i'm begin in vhdl, so need some help. below my code https://github.com/Alirio926/vhdl/blob/master/top_level.vhd
The problem, console not work.
the display and leds is just for debug. Thanks for help
A few things: 1) I see an instantiation of a ROM, but I don't see a component declaration. 2) How are you initializing the ROM with a .mif file? I don't see a synthesis attribute to do this unless you have created the ROM as an IP and set the .mif as a parameter setting. 3) To use System Console, there is usually a Platform Designer system (.qsys) with a connection from a JTAG-to-Avalon master bridge to a slave interface. Where is that here?