Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21602 Discussions

VIP core simulation error

Altera_Forum
Honored Contributor II
1,059 Views

hi, everyone. 

 

I am trying to simulate VIP-IP core. 

when I tried to simulate the core with Qsys model-sim gave me some errors those are like.  

 

 

.../db/ip/camCore/camCore.v(32): Module parameter 'AUTO_CONTROL_CLOCKS_SAME' not found for override. 

 

I can not touch inside of it core, how can I solve that problem?
0 Kudos
0 Replies
Reply