Verifying that a Cyclone V FPGA is good

[PDone]

I have a cyclone V FPGA Image which no longer runs in my board . This image ran in my board and is still running on other boards. If I reload an earlier image it works fine.

There is no change to the IO. I combined 4 ADC_LVDS DESERIALIZERS into one big ADC_LVDS_DESERIALIZER. The failure is that the clocks no longer work, even those that have nothing to do with the deserializer. I am able to read back a version register which is had coded and does not requite the use os a clock to read. I cannot WRITE to a register and read it back

Therefore I believe that the FPGA is bad.

Is there some kind of test utility I can use to verify this?

[a_x_h_75]

There's no magic test utility to check the status of a device. If you have other working boards, using the same FPGA image, then - assuming you have confidence in the hardware - you have a pretty good indication.

'the clocks no longer work...'

What is the source of these clocks? Is it running?

Cheers,

Alex

[jrrguzman]

@PDone​ The fact that sometimes works (it worked before but not now) or works at other boards but not in this one seems like a timing issue...but I can't tell with just the description you provide.

Try changing the seed for the fitter so the design placement changes as well and you might get a "working design" again.

[PDone]

There was a loose jumper on the board. Thanks, Pete D.

[Rahul_S_Intel1]

Hi ,

I hope the problem is solved by providing the Jumpers.

Regards,

Rahul S