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Hi
I'm brand new to cpld and starting with a max v eval board. In the installation folders there is a project called golden-top. I can't find any proper explanation of it any where on the internet or altera website or these forums. any body know? thanksLink Copied
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Its a top-level design for the evaluation board.
If you look through the installation for the board, you will likely find a schematic. Look at the schematic and look at the names in golden_top.vhd (if its VHDL) or golden_top.v (if its Verilog). If it really is a golden file, then it should have *all* pins that are assigned in the schematic included as port names on the golden top design. A top-level file is *not* sufficient to perform a hardware test. You also need a pin assignments file that tells Quartus what pins to use for what signal names on the golden top design. You may also need I/O constraints for voltage, slew-rate, pull-ups etc. Take the time to review the golden top design with respect to the schematic. Don't be surprised if you find discrepancies in the golden design. I will typically take a golden design and print out the schematic, and then check all of the pins have been defined - I then add the ones that the golden design misses. Cheers, Dave- Mark as New
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I didn't find any link to search this phrase.. Please show me here any specific link to understand that this a is top-level design for the evaluation board. Thanks in advance.
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--- Quote Start --- I didn't find any link to search this phrase.. Please show me here any specific link to understand that this a is top-level design for the evaluation board. Thanks in advance. --- Quote End --- The term "golden" is often used when discussing testbenches, and represents the "known-good" response to stimulus. I assume that "golden top" is just an extended use of this terminology, to indicate that the example design is a "known-good" top-level design for the board. However, as I comment ... it is always good judgement to compare the golden-top to a schematic to confirm the design really is "golden" :) Cheers, Dave
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