FPGA: Stratix IV (EP4SGX230KF40I3)，EPCS: EPCS128
The above two pictures are the standard FPGA configuration methods, which are consistent with the officially recommended configuration methods（JTAG+AS）.
The following two pictures are the FPGA configuration method of a circuit board I found, which is inconsistent with the officially recommended configuration method.I don't know what configuration method this is, and I didn't find the corresponding one in the official manual.
I found out that this way of configuration supports configuring sof/jic files.This should also be JTAG+AS.
The connection method on the EPCS side is the same.
The connection pins on the FPGA side, first of all, the CONF_DONE and nCE pull-up and pull-down resistors of the configuration pins are different. I found that if I changed this to the same as the official configuration, it cannot configure the sof/jic file.
The second point is that the FPGA side pins connected to EPCS are also different, AS_ASDI and AS_DATA, which are not on the same FPGA pins as the official configuration. Since the FPGA is a BGA package, I can't get the unleaded pins out.
My question is,
1. Because the pins connected to the signals AS_ASDI and AS_DATA on the FPGA side are different, does it also cause the way of the pull-up and pull-down resistors of CONF_DONE and nCE above to be different from the official configuration?
2. Although this configuration method can also configure the sof/jic file, it is not a standard configuration (JTAG+AS) connection method. Can this alternative configuration method be used for FPGA RSU? Will the connection between AS_ASDI and AS_DATA on the FPGA side cause RSU to fail?
3.Is there a corresponding relationship between the AS_ASDI and AS_DATA connection pins on the FPGA side and the CONF_DONE and nCE pull-up and pull-down resistors?
Thank you so much!!!
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