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An external MAX10 CPLD JTAG pins are connected to Cyclone V IO pins. The intent is for NIOS embedded software in Cyclone V to program the MAX10 CPLD and verify the CPLD checksum. I hear two methods like JAM and SVF. But not sure if any application or sample code exist to get me started. Not sure which method takes less memory.
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Certainly is technically possible via JAM/STAPL. Refer to this page:
Unfortunately Intel has deprecated the links to the actual software, so it is no longer available for download via the public.
I downloaded it a long time ago (7+yrs) and have used it successfully back then.
Now you have to contact an Intel sales rep and plead your case as to why they should give it to you from their private archive.
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Hi,
You can refer to below link:
https://www.intel.co.jp/content/dam/altera-www/global/ja_JP/pdfs/literature/an/an425.pdf
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The issue is getting JAM Player Source Code to incorporate in to embedded software to read JAM file and write via JTAG. The AN425.pdf app note provide a link "Altera Jam STAPL software". Upon clicking the link, the following webpage says "Product Discontinued Notice".
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Hi, Kindly expect some late reply as the owner is taking some leave until next week.
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Hi,
Could you give me your email or PM me your email so I can forward to you the JAM Stapl player?
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Hi,
Any update from your side?
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Here is my email
ganesan_doraisami@waters.com
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Hi,
You may received the software downloads via email in a few days, let me know if you haven't received it or if we have any issue we will let you know.
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Hi,
Have you received your email contents?
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I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
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