When to reset RSU block?

[RobertLiang]

Hello Experts,

I'm using the "Remote Update Intel IP".

On UG-31005 page 29, it is mentioned that the "reset" port of the RSU core should be asserted "before first use" to initialize the machine.

In my understanding, that means I have to reset the IP core immediately after power on, therefore I designed a reset logic to do this in the factory image.

The question is when the FPGA is reconfigured due to the application image error (such as watchdog timeout), it will enter the factory image, and then the logic in the factory image will automatically reset the RSU block, and the previous reconfiguration trigger condition information may be lost (will that happen?).

1. So is it recommended to reset the RSU core each time entering into the factory image?

2. If not, how to know whether it is the first time entering the factory image after power on?

3. Will all the information in the "control \ status \ update" registers lost after power on or RSU block reset?

Thank you very much!>

[JohnT_Intel]

Hi,

1. So is it recommended to reset the RSU core each time entering into the factory image?

This is only needed during power up. There will be no issue on always resetting on every factory image load.

3. Will all the information in the "control \ status \ update" registers lost after power on or RSU block reset?

The status register will not be reset when you assert reset on the remote update IP. It will only reset the state machine of the remote update IP.

[RobertLiang]

Thank you!

I guess that because the FPGA is volatile, the previous application information will not be available after a new power cycle.

Therefore can I judge if it's the first time that the factory image load after power on, by reading the previous status registers to see whether the contents are all default value?

[JohnT_Intel · Accepted solution]

Hi,

You should observed that the reconfiguration trigger condition value is "nconfig_source".

[JohnT_Intel]

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