CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Where to find the synthesizible set of Verilog? It seems no booklet of this kind in Altera's documents. The resource on internet is too much old. Can anyone give me a link or suggest? Thanks in advacne~
I learned verilog the wrong way and this book helped put me back on the right path: http://www.amazon.com/verilog-hdl-synthesis-practical-primer/dp/0965039153 So are you looking for what Quartus supports in terms of synthesizable code or are you looking for general information on this? You'll find that what Quartus II treats as synthesizable code is no different than most synthesis engines out there.
Besides text books focussing on Verilog for hardware synthesis, there's also a new standard dedicated to this topic: 1364.1 ieee standard for verilog register transfer level synthesis.
