Why must the VCCA be powered in Cyclone 10 LP even if PLLs are not being used?

[gyuunyuu]

The device documentation related to the Cyclone 10 LP FPGA states that "you must power up VCCA even if the PLL is not used".

We were comparing the power dissipation of a Microsemi IGLOO2 FPGA with the Cyclone 10 LP. The core power dissipation of the Cyclone 10 LP was significantly lower than the IGLOO2. However, when we measured the VCCA we found that although we were using no PLLs in the design the power dissipation was quite huge on it. So eventually we gave up on the idea to use Cyclone 10 LP in place of the Flash based IGLOO2 FPGA.

Why is VCCA so important? Can't Intel make FPGAs where the device can work with VCCA grounded when PLLs are not being used?

[SreekumarR_G_Intel]

Internal to the Cyclone 10 LP devcice designed such as way " POR circuit continues to monitor the VCCINT and VCCA pins so that a brown-out condition during user mode is detected. If the VCCINT or VCCA voltage sags below the POR trip point during user mode, the POR circuit resets the device ".

i am sorry i have no idea why it is designed such as way . Instead can I know how much power disspiation requirement for your project ?

Thanks,

Sree

[gyuunyuu]

See the main issue is that there is a lot of current draw on VCCA (several mA) inspite of no PLL being used in the design. This is the main problem.

[SreekumarR_G_Intel]

I agree , but this how architecture is defined already and I can let higher management know.

Thank you ,

Regards,

Sree