CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I've used some VHDL before but I need help understanding how to write data into SDRAM. I'm currently using Quartus II 11.0 and DE0-Nano. I just need a sample VHDL with some comments in it and I'll try to figure the rest of the stuff. Any help would be appreciated. Thanks.
Yes, but I also have access to Qsys. Also, I'm not only limited to the DE0-nano board but also have DE0, DE1, and DE2. If you can help me with any of those boards I would really appreciate it.
I suggest to have a look at the Avalon specifications and especially the memory mapped master interface. You can write a component in VHDL that uses this interface to access memory, and add it to your SOPC/QSys project.
I have to hook some meteorological sensors (digital) to the DE0-Nano and store the data in SDRAM. The board is to read the data every 5 seconds. It will run for approximately 10 mins.
