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Hello all,
I'm working on a project that's requiring communication over a few protocols via Stratix II GX transceivers, and have been trying to figure this issue out for a bit now. I've set up a transceiver to communicate via XAUI over four lanes, meaning that (among other inputs) I have a 64 bit tx_datain line and an 8 bit tx_ctrlenable line. I've done more work with GIGE than I have with XAUI, so most of my experience with control vs data codes comes from that application. What I am trying to figure out is this: if I were to try to transmit 32 bytes of data, byte 1 of which is a start of packet control code, what would the correct input sequence for the XAUI data and control lines be? I know that I need to set ctrlenable high for the lane with the start of packet control code when it transmits said control code, but do I need to do anything to inform the transceiver that it is about to start transmitting data? For example, do I need to set all control bits high and send a start of packet code across all transceiver lanes before transmitting the actual sequence of data? Or am I alright to just start transmitting at byte one, setting tx_controlenable[0] high for the first byte and all other control codes low at all other times? I've tried playing around with various control code combinations a bit on my own, but my results thus far have been somewhat frustratingly inconclusive =(Link Copied
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I am not an expert in XAUI. But, I am aware that there is a section in Stratix II GX handbook that describes link Synchronization in XAUI mode. Please, review "Synchronization ||k|| (Word Aligner)" section on page 2-171 of the recent version (October, 2007) of the device handbook. It states, that four K28.5 control characters are required. You also need /A/ characters for Lane Deskew. Figure 2-124 should be helpful. It further references to Clause 48 of IEEE P802.3ae. I think, the key is to understand the whole synchronization flow. I hope, it helps.
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