Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
Need Forum Guidance? Click here

Search our FPGA Knowledge Articles here.
18987 Discussions

a simple Avalon Memory Mapped master design

Altera_Forum
Honored Contributor II
826 Views

Hi all , 

 

i want to create a DUT that write and then read the value from the same address with Avalon Memory Mapped protocol 

is there a document that explains the basics of Avalon Memory Mapped protocol or a design that i can use for this task ? 

 

Thanks
0 Kudos
1 Reply
Reply