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addressing in Nios II processor

Altera_Forum
Honored Contributor II
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Hello all, 

I want to know about dynamic and native addresses and their alignment in Nios II processor. I do not understand how these addresses are used and incremented for addressing any location in processor and memory. How do I calculate offset for a particular address. Which one is more efficient ? Dynamic or Native? 

Can any one please help me in resolving this issue? :confused: 

Thank You.
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Altera_Forum
Honored Contributor II
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Hello Avani27. 

 

Please look at the thread "How the avalon mm slave "address alignment" works?  

Especially the reply by BadOmen. 

 

If you have further questions, please be so kind to narrow down your question so we can help you further. 

 

Best Regards, 

Johi
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