applied counter at use verilog hdl in quartus II on board Cyclon II

[Altera_Forum]

I use Cyclon II board to applied Counter program by verilog hdl code in quartus II when compiler program successful ok 

Now My problem I want start counter up when Press push button from 0 untel 15 binary display on board but my problem why neccessary press push button to increase cunter I want Generate Clock by itself. I believe My problem in Assinment clock in Quartus II. Please anyone clear My problem tell me.  my code is   module counter (  clk,  reset,  result,  ena );  input clk;  input reset;  input ena;  output [3:0] result;  reg [3:0] result;  always @(posedge clk or posedge reset)  begin  if (reset)   result = 0;   else if (ena)   result = result + 1;  end endmodule

[Altera_Forum]

--- Quote Start ---  I use Cyclon II board to applied Counter program by verilog hdl code in quartus II when compiler program successful ok Now My problem I want start counter up when Press push button from 0 untel 15 binary display on board but my problem why neccessary press push button to increase cunter I want Generate Clock by itself. I believe My problem in Assinment clock in Quartus II. Please anyone clear My problem tell me.  my code is   module counter (  clk,  reset,  result,  ena );  input clk;  input reset;  input ena;  output [3:0] result;  reg [3:0] result;  always @(posedge clk or posedge reset)  begin  if (reset)   result = 0;   else if (ena)   result = result + 1;  end endmodule  --- Quote End ---    Hi ALMODAWAN,  your code looks fine to me, but what is your clock frequency ? Who is driving the "ena" signal?   Kind regards  GPK

[Altera_Forum]

ena is enable count I assined switch to do so in board. 

If you understand me  How count increase without always press poshbotun I want generate clock itself.

[Altera_Forum]

--- Quote Start ---  ena is enable count I assined switch to do so in board. If you understand me  How count increase without always press poshbotun I want generate clock itself.  --- Quote End ---    The easiest way to get rid of the botton is removing the ena signal in your design. By doing that, the counter will count up with every positive clock edge. Could you please describe more detailed what you would like to do with your design ? How are you generating the require clock ?  Kind regards  GPK

[Altera_Forum]

ok iwill remove ena 

module counter ( clk, reset, result, ena ); input clk; input reset; output [3:0] result; reg [3:0] result; always @(posedge clk or posedge reset) begin if (reset)  result = 0;  else result = result + 1; end endmodule  now you know de2 board it's has 4 poshbutton I want press poshbutton just one time or only press button at firs count after that the count increase number from 0 to 15 between 0 and 1 for exam 50ns ok . I don't like press button all time. Are you anderstand me now?

[Altera_Forum]

--- Quote Start ---  ok iwill remove ena module counter ( clk, reset, result, ena ); input clk; input reset; output [3:0] result; reg [3:0] result; always @(posedge clk or posedge reset) begin if (reset)  result = 0;  else result = result + 1; end endmodule  now you know de2 board it's has 4 poshbutton I want press poshbutton just one time or only press button at firs count after that the count increase number from 0 to 15 between 0 and 1 for exam 50ns ok . I don't like press button all time. Are you anderstand me now?  --- Quote End ---    Hi,  should the count stop at "15" and starting again after pressing the reset ?  Kind regards  GPK