.bdf to .vhd

[Altera_Forum]

I'm very new to coding in VHDL, and I'm not even sure how to convert this .bdf file into a .vdh file. I have all of the symbols coded already, but I'm having trouble debugging it in schematic form. If you could give me an example of how to do part of it, or tell me how to do it, or anything I would be grateful. Or (this will become apparent if you look at the file) if you could tell me how to infer a register that would be helpful as well. Thank you very much to anyone who replies. -J

[Altera_Forum]

With your VHDL file open in Quartus, go to Edit -> Insert Template and find the Register examples. In reality, I recommend buying at least one book, and/or search the internet for VHDL examples/training guides. You really are going to need examples that are explained to get going. It's not overly difficult, but there are plenty of places to go wrong without some hints to point you in the right direction.

[Altera_Forum]

Quartus II can convert many BDFs to Verilog or VHDL. Open your BDF in the GUI, then go to file->create/update->create hdl design file for current file. You can select Verilog or VHDL.  

 The tool can't convert all BDFs into Verilog or VHDL due to semantics limitations in the target language. For example, you can have multi-dimensional ports in BDF but not in Verilog.   What's your goal? Do you want to start developing in VHDL? Do you want to simulate your design in Modelsim?

[Altera_Forum]

file->create/update->create hdl design file for current file 

 is correct but just a few comments: -new crreated .vhd file is in root directory of opened project. -If you want to see this new .vhd file you must go to this directory and find it.

[Altera_Forum]

It can't be converted.