block diagram from VHD file

[Altera_Forum]

Just wondering if there is a way to generate a block diagram from just a VHD file? I am looking at an old vhd file for the max7000S:EPM7256SQC208 CPLD, also using version 10 web edition of quartus 2.

[Altera_Forum]

I think RTL viewer may help you.

[Altera_Forum]

yes. 

 File -> create/update -> symbol file from current file.  Be aware, it only likes certain things on the port map.  Edit - this just creates you a block to put in another graphic file. For a schematic view of your code, you need the RTL viewer.

[Altera_Forum]

thanks for the responses, just wondering is RTL viewer part of the quartus 2 version 10 web edition?

[Altera_Forum]

it looks like (create symbol file from current file) is not enabled, any ideas? The VHDL file is around 7 years old.

[Altera_Forum]

I was able to find the RTL viewer and get it to work as also found an associated project file.